In recent years, there has been a trend toward larger-capacity semiconductor modules for electric power use. A large-capacity semiconductor module has increased parasitic inductance because of its long wiring length. The operation of the semiconductor module at a high switching speed with a low switching loss results in an increase in surge voltage. Therefore, there has been a demand for low-inductance semiconductor modules. According to the Japanese Patent Application Laid-Open No. 2013-45974, one insulating substrate is overlaid on another insulating substrate to provide the parallel current paths, thereby reducing inductance.
In general, for the working of the semiconductor module for power use, the P electrode and the N electrode are desirably led out from the package in the same direction. According to the Japanese Patent Application Laid-Open No. 2013-45974, the N side (GND) is located immediately above the heat sink such that the P electrode and the N electrode are aligned. The wiring of the upper arm and the AC electrode being at the same potential include a plurality of components. Similarly, the wiring of the lower arm and the N electrode being at the same potential include a plurality of components.
Along with an increase in the number of components of the semiconductor module, the number of manufacturing process increases, deteriorating the assembly performance. In particular, the technique has been unfortunately unsuitable for application to a large-capacity product including a plurality of parallel arrangements of semiconductor elements. In addition, the double-layer structure of insulating substrates has deteriorated the heat dispersion properties.